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COSC 2425 Chapter 1 -7 Quiz 2024
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COSC 2425 Chapter 1 -7 Quiz 2024
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COSC 2425 Chapter 1 -7 Quiz 2024_______ memory allows data to be both read from and written to easily and rapidly. -
ANSWER-RAM
_______ memory is a small, high-speed, high-cost memory that servers as a buffer for
frequently accessed data. - ANSWER-cache
________ allow movement of data to and from devices external to the computer -
ANSWER-ports
___________ is the oldest and most cost-effective of all mass-storage devices . -
ANSWER-Magnetic tape
____________ follows closely behind the CPU and memory in determining the overall
effectiveness of a computer system. - ANSWER-I/O
_________________ law states the interrelationship of all components with the overall
efficiency of a computer system with a simple formula. - ANSWER-Amdahl's
______________are divisions of concentric circles called tracks in disk drives. -
ANSWER-Sectors
. ______________ devices offer another approach to transcend the limits of magnetic
storage. - ANSWER-Micro-electro-mechanical
01AF (base 16) = _____ (base 10) - ANSWER-01AF = (0 × 16³) + (1 × 16²) + (10 × 16¹)
+ (15 × 16⁰) = 431
1101101 (base 2) = ______ (base 10) - ANSWER-1 • 2^6 = 64
1 • 2^5 = 32
0 •2^4 = 0
1 • 2^3 = 8
1 • 2^2 = 4
0 • 2^1 = 0
1 • 2^0 = 1
Sum = 109 base 10
Answer:
109
26. Which MARIE instruction is being carried out by the RTN that follows?
MAR - X
,MBR - M[MAR]
AC - MBR - ANSWER-Load X
67 (base 10) = _______ (base 3) - ANSWER-3|67
3| 22 - Remainder = 1
3| 7 - Remainder = 1
3| 2 - Remainder = 1
3| 2 - Remainder = 2
Answer:
2111
728 (base 9) = ______(base 10) - ANSWER-10| 593
10| 59 - Remainder = 3
10| 5 - Remainder = 9
10| 5 - Remainder = 5
Answer:
593
A "jump" statement is an example of: - ANSWER-a transfer of control instruction
A "store" statement is an example of: - ANSWER-a data movement instruction
A "subtract" statement is an example of: - ANSWER-an arithmetic operation
A computer bus consists of data lines, _____, control lines, and power lines - ANSWER-
address lines
A digital computer has a memory unit with 24 bits per word. The instruction set consists
of 150 different operations. All instructions have an operation code part (opcode) and an
address part (allowing for only one address). Each instruction is stored in one word of
memory. How many bits are left for the address part of the instruction? - ANSWER-16
A digital computer has a memory unit with 24 bits per word. The instruction set consists
of 150 different operations. All instructions have an operation code part (opcode) and an
address part (allowing for only one address). Each instruction is stored in one word of
memory. How many bits are needed for the opcode? - ANSWER-8
A digital computer has a memory unit with 24 bits per word. The instruction set consists
of 150 different operations. All instructions have an operation code part (opcode) and an
address part (allowing for only one address). Each instruction is stored in one word of
memory. What is the largest unsigned binary number that can be accommodated in one
word of memory? - ANSWER-2^24-1
, A digital computer has a memory unit with 24 bits per word. The instruction set consists
of 150 different operations. All instructions have an operation code part (opcode) and an
address part (allowing for only one address). Each instruction is stored in one word of
memory. What is the maximum allowable size for memory? - ANSWER-2^16
A major advantage of direct mapped cache is its simplicity and ease of implementation.
The main disadvantage of direct mapped cache is: - ANSWER-its performance is
degraded if two or more blocks that map to the same location are used alternately.
A nonpipelined system takes 200ns to process a task. The same task can be processed
in a 5-segment pipeline with a clock cycle of 40ns. Determine the speedup ratio of the
pipeline for 200 tasks. What is the maximum speedup that could be achieved with the
pipeline unit over the nonpipelined unit? - ANSWER-5
A simpler and more elegant approach is memory-mapped I/O because I/O devices and
main memory share the ____________________. - ANSWER-same address space
A stack-organized computer uses _______ addressing. - ANSWER-Zero
Accumulator architectures store one operand on the stack and the other in the
accumulator. - ANSWER-False
Add the following unsigned binary number as shown.
01000100 +
10111011
------------ - ANSWER-11111111
Assembly Language - ANSWER-uses alphabetic (mnemonic) codes in place of binary
strings
Assume a system? 's memory has 128M bytes. Blocks are 64 bytes in length and the
cache
consists of 32K blocks. Show the format for a main memory address assuming a 2-way
set
associative cache mapping scheme and byte addressing. Be sure to include the fields
as well as their sizes. - ANSWER-Each address has 27 bits, and there are 7 in the tag
field, 14 in the set field, and 6 in the offset field.
Assuming we are using the Hamming algorithm presented in your text and even parity
to design an error-correcting code, find the code word to represent the 8-bit information
word 01001000. - ANSWER-Given Code: 01001000
For Encoding:
P1:
P2:
d1: 0
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