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Digital Logic Fundamentals Test Questions and Answers (Latest Update 2024)
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Digital Logic Fundamentals Test Questions and Answers (Latest Update 2024)
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Digital Logic Fundamentals TestQuestions and Answers (Latest Update
2024)
D-type flip-flops have? - Correct Answer ✅One D input and
one clock input
Equality is a condition in which input logic states are? -
Correct Answer ✅Not complimentary
You are given a defective logic circuit to troubleshoot, repair,
and calibrate your first operation is to? - Correct Answer
✅Preform a general visual inspection
A standard 7400 series TTL gate? - Correct Answer ✅Has a
faster response time than an equivalent CMOS gate
In the set state, the Q of a output of a set/reset flip flop -
Correct Answer ✅High
If the first input of a two-input NOR gate is high, the gate
output? - Correct Answer ✅Is low
, Digital Logic Fundamentals Test
Questions and Answers (Latest Update
2024)
Once the flip-flop state is established, additional inputs of the
same state? - Correct Answer ✅Has no effect
In a set/reset flip-flop the two outputs, Q and not Q are? -
Correct Answer ✅Complimentary
An open collector designation means that the gate output? -
Correct Answer ✅Is composed of a collector lead
If CLR (clear)is activated on a JK flip-flop, the Q and not Q
levels are? - Correct Answer ✅Low and high, respectively
For all combinations of inputs, OR/NOR gate are? - Correct
Answer ✅Complimentary
To drive a TTL input from a slow rise time waveform - Correct
Answer ✅Use and open collector gate
An EXCLUSIVE-OR gate? - Correct Answer ✅Can be used as
an inverter
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