ECET-105 Week 7 Lab: Flip-Flops and Enhanced Adder-Subtractor
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Course
ECET 105
Institution
DeVry University, Chicago
Flip-Flops and Enhanced Adder-Subtractor DeVry University I. Introduction In this lab my lab partner and I investigated flip-flops. This Lab uses D-type and J-K flip-flop circuits to study i ts operations, measure some key timing parameters, and build an enhanced version of the adder-subtractor cir...
In this lab my lab partner and I investigated flip-flops. This Lab uses D-type and J-K
flip-flop circuits to study its operations, measure some key timing parameters, and build
an enhanced version of the adder-subtractor circuit. As we began to build the circuits I
had difficulties getting the circuit complete without a short. Thanks to the software
provided by the school I was able to figure out there was a short in the way I was setting
it up. Below you will see the physical circuit built during class along with circuits built
on the computer with the same components only digitized. Hope you learn and enjoy the
lab report.
II. Objective
The objective in this lab is to test the operation of a 74LS74 D flip-flop and compare
the operation with the predicted behavior. Another objective of this lab is to also test the
operation of a 74LSS112 J-K flip-flop and compare to the operation with the predicted
behavior as well as measuring the propagation delays of a 74LS112JK flip flop. Finally,
to build and test an enhanced adder-subtractor.
III. Part List
Equipment:
IBM PC or Compatible with Windows 2000 or Higher
Quartus II Design Software—Version 9.1
Frequency Generator
Oscilloscope
Parts:
2 – 330 Ω resistors, ¼ W 2 – Red LEDs
1 – 74LS74 dual D flip-flop 1 – Green LED
1 – 74LS112 dual J-K flip-flop 1 – SPDT Switch, DIP configuration
1 – eSOC III FPGA Board
IV. Results
In result in the lab I was able to accomplish a properly built circuit for the provided
question in the lab procedure. I was also able to successfully build it using the Quartus II
and MultiSim application. I was also able to get a better understanding of how a D flip-
flop and J-K flip-flop function while experiencing it in real time.
V. Conclusion
In conclusion I was able to successfully complete the lab assignment. I was also able
to successfully use the logic chips successfully with all the equipment provided. This
lab has taught me that circuitry is not just wires being together but a who building
process that take a good thought process along with patience to create a functional
flip flop.
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