WGU C952 EXAM REPORTED QUESTIONS WITH CORRECT ANSWERS
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Course
WGU C952
Institution
WGU C952
WGU C952 EXAM REPORTED QUESTIONS WITH CORRECT ANSWERS
Instruction Set Architecture (ISA) - Answer-The part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and ex...
WGU C952 EXAM REPORTED
QUESTIONS WITH CORRECT
ANSWERS
Instruction Set Architecture (ISA) - Answer-The part of the computer architecture related
to programming, including the native data types, instructions, registers, addressing
modes, memory architecture, interrupt and exception handling, and external I/O.
Memory Hierarchy - Answer-concept that is necessary for the CPU to be able to
manipulate data.
Strong scaling - Answer-Speed-up achieved on a multiprocessor without increasing the
size of the problem.
Weak scaling - Answer-Speed-up achieved on a multiprocessor while increasing the
size of the problem proportionally to the increase in the number of processors.
Not bound by Amdah's Law
multiprocessor architecture - Answer-A unified graphics and computing multiprocessor
executes vertex, geometry, and pixel fragment shader programs, and parallel computing
programs
Streaming processor (SP) - Answer-the primary thread instruction processor in the
multiprocessor
Special function unit (SFU) - Answer-Compute 32-bit floating-point approximations to
reciprocal, reciprocal square root, and key transcendental functions. It also implements
32-bit floating-point planar attribute interpolation for pixel shaders, providing accurate
interpolation of attributes such as color, depth, and texture coordinates.
Uniform Memory Access (UMA) - Answer-A multiprocessor in which latency to any word
in main memory is about the same no matter which processor requests the access.
Non-Uniform Memory Access (NUMA) - Answer-Varying system memory access times,
because of system hardware.
,throughput - Answer-the amount of work performed by a system during a given period
of time
CPU Time Formula - Answer-(Instructions) x (CPI) x (Clock Cycle Time)
Set Associative Cache - Answer-A cache that has a fixed number of locations (at least
two) where each block can be placed
(Block number) modulo (Num set in the cache)
Variable
one-way - Original set
two-way - Will improve overall performance
four-way
eight-way
Fully associative cache - Answer-A cache structure in which a block can be placed in
any location in the cache.
CDC 6600 - Answer-This system is widely considered to have been the first
supercomputer. Also first load-store architecture
Tomasulo's Algorithm - Answer-An algorithm for dynamic scheduling and out-of-order
execution
uses dynamic hazard detection, generalized forwarding, and reservation stations.
IBM 7030 - Answer-AKA Stretch
Produced with the goal of being 100 times faster than the previous IBM 704
Imprecise interupt - Answer-The unpopularity of imprecise interrupts led to the standard
of commit units in dynamically scheduled pipelined processors
Digital Equipment Corporation (DEC) - Answer-A major American company in the
computer industry from the 1950s to the 1990s
PDP-8 - Answer-First commercial minicomputer introduced by Digital Equipment
Corporation
, Seymour Cray - Answer-American inventor of the Cray supercomputer.
Least Significant Bits - Answer-The two bits furthest to the right
most significant bit - Answer-left most bit
Sign and magnitude representation - Answer-a signed number representation where a
single bit is used to represent the sign and the remaining bits represent the magnitude
sign extension - Answer-function of a copy signed load is to copy the sign repeatedly to
fill the rest of the register
LEGv8 fields - Answer-1. opcode - 11 bits - basic operation of the instruction
2. rm - 5 bits - the second register source operand
3. shamt - 6 bits - shift amount
4. rn - 5 bits - the first register source operand
5. rd - 5 bits - the register destination operand
B.EQ - Answer-equal
B.NE - Answer-not equal
B.LT - Answer-less than
B.LE - Answer-less than or equal to
B.GT - Answer-greater than
B.GE - Answer-greater than or equal to
condition codes (flag) - Answer-4 bits are used
In MIPS, two registers are compared and the result of the comparison is stored in a third
register. Then a conditional branching statement assess the value of the third register to
see if the condition is true or false.
Negative (N)
Zero (Z)
Overflow (V)
Carry (C)
B.MI - Answer-branch on minus
N=1
B.PL - Answer-branch on plus
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