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CMSC 411 Second Exam Questions And Answers Latest Update $14.99   Add to cart

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CMSC 411 Second Exam Questions And Answers Latest Update

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CMSC 411 Second Exam Questions And Answers Latest Update

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  • October 23, 2024
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  • 2024/2025
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Solution 2024/2025
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CMSC 411 Second Exam Questions And
Answers Latest Update

Pipelining ANS✔✔ Arrange the hardware such that more than one operation
can be performed at the same time.



IF ANS✔✔ Instruction fetch from memory



ID ANS✔✔ Instruction decode & register read



EX ANS✔✔ Execute operation or calculate address



MEM ANS✔✔ Access memory operand



WB ANS✔✔ Write result back to register



IF, ID, EX, MEM, WB ANS✔✔ five stages



Structural Hazard ANS✔✔ required resource(s) is busy and an instruction
needs it, requires stall or fix ISA or Microarchitecture



Data Hazard ANS✔✔ Need to wait for previous instruction to complete its
data read/write

, Solution 2024/2025
Pepper
Control Hazard ANS✔✔ Deciding on control action depends on previous
instruction - Branches



1-bit predictor ANS✔✔ inner loop branches mispredicted twice



2-bit predictor ANS✔✔ only change prediction on two successive
mispredictions



Exception ANS✔✔ Arises within the CPU

e.g., undefined opcode, overflow, syscall



Interrupt ANS✔✔ From an external I/O controller

e.g., USB (mouse, keyboard), print, monitor



Exception Link Register (ELR) ANS✔✔ Save PC of offending (or interrupted)
instruction



Exception Syndrome Register (ESR) ANS✔✔ Save indication of the problem



Instruction-Level Parallelism (ILP) ANS✔✔ Pipelining: executing multiple
instructions

dynamic scheduling



Deeper pipleline ANS✔✔ To Increase IPL

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