University of California, Riverside CS 153 hw3-questions with verified answers
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University of California, RiversideCS 153hw3
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University Of California, RiversideCS 153hw3
Hw 3
(a) What are the physical addresses for the following virtual addresses?
(i) 2,20
so the 2 is the segment and 20 is the offset so we check for number 2 has limit of 100 which
doesn’t applied here and with base of 70 so 20+70 = 90 so the physical address is 90
(ii) 0,330
so the 0 is for...
(a) What are the physical addresses for the following virtual addresses?
(i) 2,20
so the 2 is the segment and 20 is the offset so we check for number 2 has limit of 100 which
doesn’t applied here and with base of 70 so 20+70 = 90 so the physical address is 90
(ii) 0,330
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so the 0 is for the segment and 330 the offset which scheck the limit which is 600, which is not
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over bcause we hace 330 so now 330+ 400 is 730 as the physical address.
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(b) What is one advantage for paging over segmentation and vice versa?
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Paging have the down side of external fragmentation. Segmentation can be faster its supported
by hardware.
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II. (a) An OS is using twolevel paging to implement a 28bit virtual address space per process.
The page size is 256bytes, and the machine does not have a TLB. Explain the steps involved in
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looking up the virtual address 0x03bf04d, when all pages are present in memory. (2 points)
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First, we will need 8 bits for the 256 bytes offset and 20 bits for the VPN. The page directory is
has 14 bits and 6 for the page table. To look up the OS firs looks to the firs 14 bits and finds the
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physical address of page in the table. Now looks up the PTE for that page that it found. Finds the
the physical address which then applies to the offset
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(b) For the system above, what is the maximum number of page faults that could be generated in
response to a memory access? (2 points)
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only one page fault because the PTE or PDE has a bit that stops it.
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, III. Consider a virtual address system with the following parameters. • The memory is byte
addressable.
• Virtual addresses are 15 bits wide.
• Physical addresses are 13 bits wide.
• The page size is 128 bytes.
• The TLB is fully associative with 16 total entries.
Recall that a fully associative cache has just one set of entries—The tag field is simply the
VPN and we need to search the full TLB to check if the VPN we are seeking is in the TLB. In
the following tables, all numbers are given in hexadecimal. The contents of the TLB and the
page table for the first 16 virtual pages are as follows. If a VPN is not listed in the page table,
assume it generates a page fault.
(a) Which bits represent the VPO, the VPN? (1 point)
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Since the page table size is 128 that’s 2^8 so the VPO is bits [6:0] or the first 8 bits and the
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VPN is the las 8 bits or the [15:7]
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(b) For the virtual address 0x0422, indicate the physical address. If there is a page fault,
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enter “—” for the PPN and Physical Address. All answers should be given in
hexadecimal. (1 points)
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There is not hit in the TLB so then we move on too the page table which is also a miss so it’s a
page default. We have to called the OS to bring the informations. So x22 is the physical address
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and — thePPN
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(c) Repeat for address 0x02F1 (1 points)
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The PPN is 19 and it is valid so the physical address is 0x19F1
IV. Consider a process that has been allocated 5 pages of memory: P1, P2, P3, P4, and P5. The
process accesses these pages in the following order:
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P1 P2 P3 P4 P1 P2 P5 P1 P2 P3 P4 P5
(i) Illustrate Belady’s anomaly by precisely describing the execution of the FIFO page
eviction algorithm in two cases: a) where the machine has 3 pages of physical
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memory, and b) where the machine has 4 pages of physical memory, and by
comparing the number of page faults incurred in these two cases. (When the process
begins executing, none of its pages are present in memory.) (2 points)
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